Memory Size Reduction Through Storage Order Optimization for Embedded Parallel Multimedia Applications

In this paper, we present some strategies that are capable of reducing the required memory sizes and power consumption for a large class of data-intensive multimedia applications. This class consists of static control programs with large multi-dimensional arrays and (piece-wise) aane storage and execution order. These strategies are equally well suited for parallel and mono-processing applications, and are particularly useful in an embedded application context, where memory size and power consumption usually are the main cost factors. The main objective of these strategies is to reuse memory as much as possible by obtaining an optimal storage order for each of the arrays present in a program through (the equivalent of) data-transformations. Although size reduction is the main objective, an added beneet is the fact that the power consumption is also reduced due to the decreased capacitive load of the memories. The memory size reduction task is part of an overall memory size and power reduction methodology called ATOMIUM, in which other tasks can increase its eeectiveness (e.g. through loop transformations), but it can also be used on a stand-alone base. The presented strategies are based on an exact mathematical modeling of the memory occupation presented in an earlier paper. Here the most promising strategies are explored in more detail and their computational complexity is investigated. Their feasibility and eeectiveness is demonstrated by experimental results for some real-life multimedia applications, for which a considerable size reduction was obtained.